1. Field of the Invention
The present invention generally relates to semiconductor fabrication, and particularly to a protection device and a method for fabricating the protection device.
2. Description of Related Art
The circuit of electronic device is usually fabricated by semiconductor fabrication technology to form an integrated circuit. Various components of the semiconductor device need to be formed over a substrate, such as silicon wafer. During fabrication, the semiconductor device as currently fabricated in any stage usually needs to be tested to assure the performance as designed.
In testing procedure, the semiconductor device is probed by probing apparatus, and the electronic signals as probed are led to a pad row, which has a number of pads, for connecting to the external testing apparatus. As a result, the external testing apparatus can connect with the semiconductor device through the pads for measurement or any testing operation.
In order to protect the semiconductor devices as under tested from unexpected high voltage or large current, such electrostatic voltage/current, the pad is usually connected with a protection diode. So, when the high voltage has accidently occurred, the protection diode may break down and lead the current/voltage to the ground, without entering the semiconductor device.
The protection diode usually has a parasitic capacitor exiting at the P-N junction. This parasitic capacitor usually has a large parasitic capacitance. However, some electronic devices, such as radio-frequency (RF) device, are sensitive the capacitance. The protection diode may cause the measure shift when testing the semiconductor device.
The issue to reduce the effect caused by the parasitic capacitance from the protection diode at the pads is necessary to be considered during testing procedure.